<?xml version="1.0" encoding="UTF-8"?>
<probeData version="2" minor="2">
  <probeset name="xc7a35t_0" active="false">
    <probe type="ila" busType="bus" source="netlist" spec="ILA_V2_RT">
      <probeOptions Id="DebugProbeParams">
        <Option Id="BSCAN_SWITCH_INDEX" value="0"/>
        <Option Id="CORE_LOCATION" value="1:0"/>
        <Option Id="CORE_UUID" value="647A0986A78458669BA7B2FCEE7EF6BF"/>
        <Option Id="HUB_CLK_INPUT_FREQ_HZ" value=""/>
        <Option Id="HW_ILA" value="hw_ila_1"/>
        <Option Id="PROBE_PORT" value="0"/>
        <Option Id="PROBE_PORT_BITS" value="0"/>
        <Option Id="PROBE_PORT_BIT_COUNT" value="12"/>
      </probeOptions>
      <nets>
        <net name="u_my_xadc/value_ch1[11]"/>
        <net name="u_my_xadc/value_ch1[10]"/>
        <net name="u_my_xadc/value_ch1[9]"/>
        <net name="u_my_xadc/value_ch1[8]"/>
        <net name="u_my_xadc/value_ch1[7]"/>
        <net name="u_my_xadc/value_ch1[6]"/>
        <net name="u_my_xadc/value_ch1[5]"/>
        <net name="u_my_xadc/value_ch1[4]"/>
        <net name="u_my_xadc/value_ch1[3]"/>
        <net name="u_my_xadc/value_ch1[2]"/>
        <net name="u_my_xadc/value_ch1[1]"/>
        <net name="u_my_xadc/value_ch1[0]"/>
      </nets>
    </probe>
    <probe type="ila" busType="bus" source="netlist" spec="ILA_V2_RT">
      <probeOptions Id="DebugProbeParams">
        <Option Id="BSCAN_SWITCH_INDEX" value="0"/>
        <Option Id="CORE_LOCATION" value="1:0"/>
        <Option Id="CORE_UUID" value="647A0986A78458669BA7B2FCEE7EF6BF"/>
        <Option Id="HUB_CLK_INPUT_FREQ_HZ" value=""/>
        <Option Id="HW_ILA" value="hw_ila_1"/>
        <Option Id="PROBE_PORT" value="1"/>
        <Option Id="PROBE_PORT_BITS" value="0"/>
        <Option Id="PROBE_PORT_BIT_COUNT" value="12"/>
      </probeOptions>
      <nets>
        <net name="u_my_xadc/value_ch2[11]"/>
        <net name="u_my_xadc/value_ch2[10]"/>
        <net name="u_my_xadc/value_ch2[9]"/>
        <net name="u_my_xadc/value_ch2[8]"/>
        <net name="u_my_xadc/value_ch2[7]"/>
        <net name="u_my_xadc/value_ch2[6]"/>
        <net name="u_my_xadc/value_ch2[5]"/>
        <net name="u_my_xadc/value_ch2[4]"/>
        <net name="u_my_xadc/value_ch2[3]"/>
        <net name="u_my_xadc/value_ch2[2]"/>
        <net name="u_my_xadc/value_ch2[1]"/>
        <net name="u_my_xadc/value_ch2[0]"/>
      </nets>
    </probe>
    <probe type="ila" busType="bus" source="netlist" spec="ILA_V2_RT">
      <probeOptions Id="DebugProbeParams">
        <Option Id="BSCAN_SWITCH_INDEX" value="0"/>
        <Option Id="CORE_LOCATION" value="1:0"/>
        <Option Id="CORE_UUID" value="647A0986A78458669BA7B2FCEE7EF6BF"/>
        <Option Id="HUB_CLK_INPUT_FREQ_HZ" value=""/>
        <Option Id="HW_ILA" value="hw_ila_1"/>
        <Option Id="PROBE_PORT" value="2"/>
        <Option Id="PROBE_PORT_BITS" value="0"/>
        <Option Id="PROBE_PORT_BIT_COUNT" value="12"/>
      </probeOptions>
      <nets>
        <net name="u_my_xadc/value_insert_ch1[11]"/>
        <net name="u_my_xadc/value_insert_ch1[10]"/>
        <net name="u_my_xadc/value_insert_ch1[9]"/>
        <net name="u_my_xadc/value_insert_ch1[8]"/>
        <net name="u_my_xadc/value_insert_ch1[7]"/>
        <net name="u_my_xadc/value_insert_ch1[6]"/>
        <net name="u_my_xadc/value_insert_ch1[5]"/>
        <net name="u_my_xadc/value_insert_ch1[4]"/>
        <net name="u_my_xadc/value_insert_ch1[3]"/>
        <net name="u_my_xadc/value_insert_ch1[2]"/>
        <net name="u_my_xadc/value_insert_ch1[1]"/>
        <net name="u_my_xadc/value_insert_ch1[0]"/>
      </nets>
    </probe>
    <probe type="ila" busType="net" source="netlist" spec="ILA_V2_RT">
      <probeOptions Id="DebugProbeParams">
        <Option Id="BSCAN_SWITCH_INDEX" value="0"/>
        <Option Id="CORE_LOCATION" value="1:0"/>
        <Option Id="CORE_UUID" value="647A0986A78458669BA7B2FCEE7EF6BF"/>
        <Option Id="HUB_CLK_INPUT_FREQ_HZ" value=""/>
        <Option Id="HW_ILA" value="hw_ila_1"/>
        <Option Id="PROBE_PORT" value="3"/>
        <Option Id="PROBE_PORT_BITS" value="0"/>
        <Option Id="PROBE_PORT_BIT_COUNT" value="1"/>
      </probeOptions>
      <nets>
        <net name="u_my_xadc/cnt"/>
      </nets>
    </probe>
    <probe type="ila" busType="net" source="netlist" spec="ILA_V2_RT">
      <probeOptions Id="DebugProbeParams">
        <Option Id="BSCAN_SWITCH_INDEX" value="0"/>
        <Option Id="CORE_LOCATION" value="1:0"/>
        <Option Id="CORE_UUID" value="647A0986A78458669BA7B2FCEE7EF6BF"/>
        <Option Id="HUB_CLK_INPUT_FREQ_HZ" value=""/>
        <Option Id="HW_ILA" value="hw_ila_1"/>
        <Option Id="PROBE_PORT" value="3"/>
        <Option Id="PROBE_PORT_BITS" value="1"/>
        <Option Id="PROBE_PORT_BIT_COUNT" value="1"/>
      </probeOptions>
      <nets>
        <net name="u_my_xadc/dclk"/>
      </nets>
    </probe>
    <probe type="ila" busType="bus" source="netlist" spec="ILA_V2_RT">
      <probeOptions Id="DebugProbeParams">
        <Option Id="BSCAN_SWITCH_INDEX" value="0"/>
        <Option Id="CORE_LOCATION" value="1:0"/>
        <Option Id="CORE_UUID" value="647A0986A78458669BA7B2FCEE7EF6BF"/>
        <Option Id="HUB_CLK_INPUT_FREQ_HZ" value=""/>
        <Option Id="HW_ILA" value="hw_ila_1"/>
        <Option Id="PROBE_PORT" value="3"/>
        <Option Id="PROBE_PORT_BITS" value="2"/>
        <Option Id="PROBE_PORT_BIT_COUNT" value="8"/>
      </probeOptions>
      <nets>
        <net name="u_my_xadc/state[7]"/>
        <net name="u_my_xadc/state[6]"/>
        <net name="u_my_xadc/state[5]"/>
        <net name="u_my_xadc/state[4]"/>
        <net name="u_my_xadc/state[3]"/>
        <net name="u_my_xadc/state[2]"/>
        <net name="u_my_xadc/state[1]"/>
        <net name="u_my_xadc/state[0]"/>
      </nets>
    </probe>
    <probe type="ila" busType="net" source="netlist" spec="ILA_V2_RT">
      <probeOptions Id="DebugProbeParams">
        <Option Id="BSCAN_SWITCH_INDEX" value="0"/>
        <Option Id="CORE_LOCATION" value="1:0"/>
        <Option Id="CORE_UUID" value="647A0986A78458669BA7B2FCEE7EF6BF"/>
        <Option Id="HUB_CLK_INPUT_FREQ_HZ" value=""/>
        <Option Id="HW_ILA" value="hw_ila_1"/>
        <Option Id="PROBE_PORT" value="3"/>
        <Option Id="PROBE_PORT_BITS" value="10"/>
        <Option Id="PROBE_PORT_BIT_COUNT" value="1"/>
      </probeOptions>
      <nets>
        <net name="u_my_xadc/adc_insert_clk"/>
      </nets>
    </probe>
    <probe type="ila" busType="net" source="netlist" spec="ILA_V2_RT">
      <probeOptions Id="DebugProbeParams">
        <Option Id="BSCAN_SWITCH_INDEX" value="0"/>
        <Option Id="CORE_LOCATION" value="1:0"/>
        <Option Id="CORE_UUID" value="647A0986A78458669BA7B2FCEE7EF6BF"/>
        <Option Id="HUB_CLK_INPUT_FREQ_HZ" value=""/>
        <Option Id="HW_ILA" value="hw_ila_1"/>
        <Option Id="PROBE_PORT" value="3"/>
        <Option Id="PROBE_PORT_BITS" value="11"/>
        <Option Id="PROBE_PORT_BIT_COUNT" value="1"/>
      </probeOptions>
      <nets>
        <net name="u_my_xadc/adc_clk"/>
      </nets>
    </probe>
  </probeset>
</probeData>
